In this use case, we will explore how simulation with SIMULIA CST Studio can be used to prevent thermal failure
Thermal runaways cause 50% of electronic failures, and often, thermal testing is left until late in the design process, when any failure is likely to cause a significant delay and expense. In this article, we will be exploring how involving simulation early in the design process to model electrical loss can be used to avoid thermal failure.
Preventing Thermal Failure: Setting the Scene
Electrical simulations that model electrical loss can be directly used to create thermal simulations to avoid this problem. The loss results from this electrical simulation can then be used in thermal simulation design which will be shown with this example of thermal vias.
What are Thermal Vias?
Thermal vias are used to transport the heat away from fragile ICs. Thermal vias are essentially holes in the substrate filled with metal, located under a surface-mounted heat source/powered on IC in a circuit board that allows high heat transfer. To corroborate the simulations, a set of samples was made and measured.
Preventing Thermal Failure: Measuring Thermal Conductivity
Thermal vias provide high heat transfer material channels to remove heat from certain areas of a PCB or, in this case, a substrate. The substrate used in this example is LTCC – Low-Temperature Co-fired Ceramic – it is easy to customize thermal vias in LTCC with different pitch sizes and via diameters utilizing this technology. The LTCC is built using printed nets on “green tape”; the vias, both thermal and electrical, are punched on this soft green tape and filled. Then the recordings are laminated together and fired into a ceramic solid.
These vias have been stacked directly on top of one another and filled with a silver alloy. The layered design is illustrated here with an 8.5-mil layer of LTCC (LTCC 951) that separates the top radiator and the “ground plane” or printed conductor layer (and so acts as a heated piece of dielectric on top of the thermal vias). The vias were inserted between the ground planes.
A current is then run through the conductor serpentine “radiator” constructed with a Silver –Palladium alloy. This conductor provides an electrical resistance of 60mOhms/sq. This serpentine resistor spans the area of vias and allows the power to be converted and heated evenly across the material.
The LTCC samples were mounted to a flange and monitored with a thermal camera. The IR thermal camera records the peak temperature of the radiator and the temperature at the top of the flange. The top of the flange was held at a constant 50 degrees C while the power was increased in 10- or 25-Watt increments. The flange temperature was also checked using a thermocouple. The thermal resistance of the solder layer and separation layer was calculated and subtracted from the total thermal conductivity to isolate the LTCC/via composite thermal conductivity result.
IR Camera image of radiator sample
Measured data of four-layer Dupont 951 comparing thermal conductivity results of material with no vias and with 6-mil vias with 2, 2.5, and 3 diameters spacing is shown. The X-axis is the power level applied to the radiator circuit, and Y-axis is the increase in temperature. Vias with 8 and 10 mil diameters (with 2, 2.5, and 3 diameters spacing) were also measured and have the same trends as the six mils via the set of samples shown.
The thermal conductivity of the Duport 951 was measured to be 3.2 W/m.K, similar to 3.3 W/m.K given in the Dupont data sheet.
Preventing Thermal Failure: How do Thermal Vias impact Thermal Conductivity?
Adding thermal vias increases the thermal conductivity of the ceramic LTCC structure by 3-10 times for this set of samples. The LTCC samples with thermal vias included have thermal conductivity like that of Alumina (considered an excellent thermal conductor for a ceramic material). For any of the diameters, the denser the thermal vias – 2 diameters versus 2.5, and 2.5 versus 3 – the higher the overall thermal conductivity. This is seen with the graph where the 2-diameter spacing sample can reach 250 watts before a peak temperature of ~160 degrees C. The 2.5 diameter reaches 200 watts with this peak temperature. The 3-diameter has a steeper slope than the 2.5-diameter spacing. This is seen for all the via diameters and is expected. More thermal via density should mean better overall thermal performance.
As via size decreases, the thermal conductivity increases; if the conductivity was calculated using an analytic method such as the rule-of-mixtures, the equivalent volume percentile or ratio of LTCC ceramic to conductor fill depends on the via spacing, not the via diameter (for the configuration of vias used here). The via fill percentage volume of 6-mil, 8-mil, and 10-mil vias with 2-diameter via spacing is the same and, according to the rule-of-mixtures, should give the same result. In reality, this is not the case; while the percentage volume of each of the via spacings (2, 2.5, and 3 diameters spacing) is the same, the measured thermal conductivity results differ. In addition, the rule-of-mixtures gives a deceptively high thermal conductivity compared to the measured result. The 6-mil via array, which offers the highest thermal conductivity, achieves a thermal conductivity of 34 W/m.K, while the rule-of-mixtures theory estimates 51.1 W/m.K.
Preventing Thermal Failure: Simulation
For this example, we have used SIMULIA CST Studio for our virtual prototyping, where the model was built and run with three different numerical solvers for three other design aspects.
First, the Ohms of the serpentine radiator was determined by using the RLC solver simulated to be 3.45 Ohms. Then, the same model was simulated with the configuration of the measured samples (6, 8, 10-mil vias with 2, 2.5, 3 diameters spacing) using a Js, a static (DC) current solver coupled to a THs (Thermal steady state convection solver). Numerical techniques mesh the structure and solve the equations within each mesh cell and then use a global mesh to connect all the mesh cells and results. The mesh of the THs solver is shown.
The meshing of the substrate and thermal vias.
Like the IR camera measurement is the results from the THs (convection) solver. For example, if the setup was more complicated, there was significant airflow across the radiator. Other thermal solvers could be used, such as the CHT (Conjugate Heat Transfer), which models all heat transfer, also known as computational fluid dynamics.
The heat transfer is shown to rely on the high thermal conductivity of the thermal vias. Cross-section power flux resulting from simulated models is shown here. The heat predominantly flows through the vias; therefore, the surface area between the ceramic/substrate and the metal drives the relationship between diameter and size to overall thermal conductivity – rather than a rule of mixtures approach. Simulation explicitly shows this and is close to the measurement values (indicated by table results).
The first part of the simulation model set was to replicate the LTCC without vias. Including all the structures in the thermal path with the individual material characterization, including the DuPont LTCC thermal material and metal characteristics. The measured thermal conductivity of Dupont LTCC 951 was 3.2 W/m.K, the datasheet was 3.3 W/m.K, and the simulated result was 3.17 W/m.K.
The vias were set up with all three via diameter settings and spacings. The second part of the simulation model set was to replace the LTCC with vias with the equivalent homogeneous thermal conductivity and check the results were similar. A power level of 100 Watts, which was tested on all via structures, and was middle of the range, was tested. The results of this were very close to the equivalent measured effects as shown.
Preventing Thermal Failure: Comparing Measurements and Simulation Results
|LTCC Via size and spacing||Conductivity (W/m.K)||Power||Temperature rise||Temperature rise|
|Measured Results||Simulated Results|
|8 mil 2 diameter||22||100||75.76||77.89|
|6 mil 2.5 diameter||18||100||83||84.54|
|6 mil 2.5 diameter and 10 mil 2 diameter||17||100||84.42/85.34||86.34|
|6 mil 3 diameter||15||100||92.21||91.22|
|10 mil 2.5 diameter and 8-mil 3 diameter||13||100||97.2/99.2||94.79|
|10 mil 3 diameter||10||100||118.61||107.35|
Success with SIMULIA CST Studio
SIMULIA CST is a powerful tool that can help prevent thermal failure by allowing engineers to analyze and predict the thermal behavior of any product or system, allowing you to prevent thermal failure. With its advanced thermal solvers and accurate modeling capabilities, SIMULIA CST can accurately simulate the heat transfer and thermal management of products in various environments and conditions. This allows engineers to identify potential thermal failure points and take corrective action before the product is built.
Additionally, SIMULIA CST can also be used to optimize the thermal design of a product, reducing the risk of thermal failure, and increasing its reliability and efficiency. By using SIMULIA CST, engineers can ensure that their products will perform as expected and meet the thermal requirements of the application.
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